6.823 Computer System Architecture - Spring 2019


Top
Course Info
Staff
Announcements
Syllabus
Reading List
Lecture Notes
Study Materials
Recitations
Labs
Links
6.823 Spring 2019 Reading List
Optional readings are NOT required for the class, but interested students are always encouraged to check them out for in-depth understanding of the topics.

Readings refer to:

  • H&P6: Computer Architecture: A Quantitative Approach, 6th edition, by Hennessy and Patterson
  • H&P5: Computer Architecture: A Quantitative Approach, 5th edition, by Hennessy and Patterson
  • H&P4: Computer Architecture: A Quantitative Approach, 4th edition, by Hennessy and Patterson
  • H&P3: Computer Architecture: A Quantitative Approach, 3rd edition, by Hennessy and Patterson
  • H&P2: Computer Architecture: A Quantitative Approach, 2nd edition, by Hennessy and Patterson
  • P&H: Computer Organization & Design, by Patterson and Hennessy
  • D&T: Principles and practices of interconnection networks by Dally and Towles.
All these books and their online/e-book versions are available through MIT libraries.


Description Reading (H&P6) Reading (H&P5) Reading (H&P4) Reading (H&P3) Reading (H&P2)
History of Calculation and Computer Architecture App M App L App K Ch 1: p67-72 Ch 1: p53-60
Influence of Technology and Software on Instruction Sets: Up to the dawn of IBM 360 Ch 1: p2-67 Ch 1: p2-61 Ch 1: p2-54
App J: p83-90
Rest of Ch 1 Rest of Ch 1
From Non-Pipelined ISA Implementation to a Simple Pipeline App A: p2-33 App A: p2-32 App B: p2-32 Ch 2: p90-129 Ch 2: p69-96
Instruction Pipelining and Hazards App C: p2-10 (background: P&H Ch 6) App C: p2-11 (background: P&H Ch 6) App A: p2-11 (background: P&H Ch 6) App A: p2-11 (background: P&H Ch 6) Ch 3: p125-160 (background: P&H Ch 6)
Microprogramming App C: p45 App C: p50-51 App A: p46-47 Ch 2: p129-158 Ch 2: p96-116
Caches Ch 2: p78-84
Ch 2: p94-118
App B: p2-40
Ch 2: p72-96
App B: p2-40
Ch 5: p288-310
App C: p1-38
Ch 5: p413-460, p478-489 Ch 5: p390-439, p457-474
Complex Pipelines: Superscalar/Scoreboarding App C: p37-70 App C: p43-81 App A: p37-77 App A: p47-78 Ch 3: p187-214
Complex Pipelins: OOO & Register Renaming Ch 3: 191-240 Ch 3: 167-212 Ch 2: 89-129 Ch 3: p172-196 Ch 4: p221-261
Branch Prediction Ch 3: p182-191 Ch 3: p162-167 Ch 2: p80-89 Ch 3: p196-259 Ch 4: p262-289, p317-335
Speculative Execution Ch 3: p228-240 Ch 3: p202-213 Ch 2: p121-141
Advanced Memory Operations
Absolute Addresses to Demand Paging Ch 2: p118-142; App B: p40-59 Ch 2: p105-131; App B: p40-60 Ch 5: p315-342; App C: p38-58 Ch 5: p460-478 Ch 5: p439-457
Modern Virtual Memory App L App A: p37-47 Ch 3: p178-187
Multithreading Ch 3: p242-247 Ch 3: p223-247 Ch 3: p172-185 Ch 3: p272-273,
Ch 6: p608-615, 635-636
VLIW/EPIC App H App H App G Ch 4: p304-362 Ch 4: p223-240, p284-317
Vector processors Ch 4: p282-310
App G
Ch 4: p262-288
App G
GPUs Ch 4: p310-336 Ch 4: p288-315
On-Chip Networking [Dally & Towles] Topology: Ch3 p45-60 (3.1-3.3), Ch5 p89-98 (5.1-5.2); Flow control: Ch12 p221-230 (12.1-12.3), Ch13 p233-250 (13.1-13.3); Routing: Ch8 p159-168 (8.1-8.4), Ch9 p173-180 (9.1-9.3), Ch14 p258-270 (14.1-14.2); Router microarchitecture: Ch16 p305-319 (16.1-16.5)
Synchronization and Sequential Consistency Ch 5: p417-422 Ch 5: p392-400 Ch 4: p243-249 Ch 6: p590-607 Ch 8: p694-713
Cache Coherence Ch 5: p377-412 Ch 5: p351-386 Ch 4: p205-237 Ch 6: p549-590, App I Ch 8: p654-693, App E
Directory-Based Cache Coherence Protocols: Part I Ch 5: p404-412 Ch 5: p351-386 Ch 4: p230-237 Ch 6: p549-590, App I Ch 8: p654-693, App E
Directory-Based Cache Coherence Protocols: Part II
Relaxed Memory Models Ch 5: p419-422 Ch 5: p394-400 Ch 4: p245-249 Ch 6: p607-608, 618-619 Ch 8: p714-720