Handouts

• Handout 1 - EDSACjr
• Handout 2 - CISC x86
• Handout 3 - RISC MIPS
• Handout 4 - Cache.
• Handout 5 - Victim Cache.
• Handout 6 - Virtual Memory
• Handout 7 - LMIPS (Quiz 1 Handout)

Problem Sets

• Problem Set 1 (L01,02,06,07) (Solution)
• Problem Set 2 (L01-07) (Solution)

Quizzes

• 2015 Quiz 1 (Solution)
• 2016 Quiz 1 (Solution)

Handouts

• Handout 8 - In-order Scoreboarding
• Handout 9 - Out-of-order with Re-order Buffer (ROB)
• Quiz 2 Handout

Problem Sets

• Problem Set 3 (L08-09) (Solution)
• Problem Set 4 (L10) (Solution)
• Problem Set 5 (L11) (Solution)
• Problem Set 6 (L14) (Solution)
• Problem Set 7 (L12) (Solution)

Quizzes

• 2014 Quiz 2 (Solution)
• 2015 Quiz 2 (Solution)
• 2015 Quiz 4 (only Part A: Reliability) (Solution)
• 2016 Quiz 2 (Solution)

Handouts

• Handout 10 - Router Architecture
• Handout 11 - Directory Protocol
• Handout 12 - Snoopy Protocol
• Handout 13 - Single-producer/Multi-consumer Shared-Memory Queues

Problem Sets

• Problem Set 8 (L15-17) (Solution)
• Problem Set 9 (L18) (Solution)

Quizzes

• 2014 Quiz 3 (Solution)
• 2015 Quiz 3 (Solution)
• 2016 Quiz 3 (Solution)

Handouts

• Handout 14 - Bus-Based MIPS Implementation

Problem Sets

• Problem Set 10 (L20-21) (Solution)

Quizzes

• 2014 Quiz 4 (Solution)
• 2015 Quiz 4 (Solution)
• 2016 Quiz 4 (Solution)