| Tuesday |
Thursday |
Friday |
|
Feb 4 - L01
Introduction
Take Self-Assessment Test!
|
Feb 6 - L02
Hardwired, Single-cycle ISA Implementation
|
Feb 7 - Tutorial Session
Self-Assessment Test DUE
|
|
Feb 11 - L03
Cache Organization
|
Feb 13 - L04
Memory Management: From Absolute Addresses to Demand Paging
|
Feb 14 - Tutorial Session
Lab 0 DUE
|
|
Feb 18 - No lecture* |
Feb 20 - L05
Modern Virtual Memory
|
Feb 21 - Tutorial Session
|
|
Feb 25 - L06
Instruction Pipelining and Hazards
|
Feb 27 - L07
Instruction Pipelining: Hazard Resolution and Timing Constraints
|
Feb 28 - Tutorial Session
Lab 1 DUE
|
|
Mar 3 - L08
Complex Pipelining: Superscalar and Scoreboarding
|
Mar 5 - L09
Out of Order Execution and Register Renaming
|
Mar 6 - Quiz 1
Up to L07
|
|
Mar 10 - L10
Branch Prediction
|
Mar 12 - L11
Speculative Execution and Recovery
|
Mar 13 - Tutorial Session
|
|
Mar 17 - BREAK
|
Mar 19 - BREAK
|
Mar 20 - BREAK
|
|
Mar 24 - SPRING BREAK
|
Mar 26 - SPRING BREAK
|
Mar 27 - SPRING BREAK
|
|
Mar 31 - L12
Advanced Memory Operations
|
Apr 2 - L13
Multithreading
|
Apr 3 - Tutorial Session
Lab 2 DUE
|
|
Apr 7 - L14
Cache Coherence (I)
|
Apr 9 - L15
Cache Coherence (II)
|
Apr 10 - Quiz 2
Up to L13
|
|
Apr 14 - L16
On-chip Networking (I)
|
Apr 16 - L17
On-chip Networking (II)
|
Apr 17 - Tutorial Session
|
|
Apr 21 - L18
Memory Consistency Models
|
Apr 23 - L19
VLIW
|
Apr 24 - Tutorial Session
Lab 3 DUE
|
|
Apr 28 - L20
SIMD and Vector Processors
|
Apr 30 - L21
GPU Architectures
|
May 1 - Quiz 3
Up to L18
|
|
May 5 - L22
Transactional Memory
|
May 7 - L23
Security and Virtualization
|
May 8 - Tutorial Session
Lab 4 DUE
|
|
May 12 - Quiz 4
(In class) Up to L22
|
|
|
* - Tuesday Feb 18th follows a Monday schedule due to President's day.