6.5930/1 Hardware Architecture for Deep Learning - Spring 2024


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Paper Review
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Overview
Introduction to the design and implementation of hardware architectures for efficient processing of deep learning algorithms and tensor algebra in AI systems. Topics include basics of deep learning, optimization principles for programmable platforms, design principles of accelerator architectures, co-optimization of algorithms and hardware (including sparsity) and use of advanced technologies (including memristors and optical computing). Includes labs involving modeling and analysis of hardware architectures, architecting deep learning inference systems, and an open-ended design project. Students taking graduate version complete additional assignments.

Course Information

Warning: All information on this website is subject to change. Though we send messages to the class in case of a change, please do check the course web site in case of doubt.

Lectures: Lectures will be from 1:00PM to 2:30 PM every Monday and Wednesday.

Recitations: A 1-hour recitation session will be held each week on Friday at 11 AM.

Office Hours: See the staff page and piazza for details.

Class Participation:
  • We ask that during the semester each student either ask or answer at least a total of five questions related to the lectures in Piazza.
  • Multiple (distinct) answers to a single question are permitted.
  • If you ask a question in class, please also submit the question to Piazza (for grading purposes). But providing the lecturer's answer doesn't count.

Laboratory Exercises: There will be four Laboratory Exercises.
  • Lab 1: Inference and DNN Model Design
  • Lab 2: Kernel + Tiling Optimization
  • Lab 3: Hardware Design & Mapping
  • Lab 4: Sparse Accelerator Design

Paper Review: We will be forming a program committee of the (fictional) Deep Learning Hardware (DLH) Conference. The goal of the conference is to learn how to read papers (critique and extract information), enable wider coverage of papers, and gain insight of how paper decisions are made.

Final Design Project: You will be able to apply concepts and tools learnt from the class to the final project. You could either choose from a list of suggested projects or propose own project (requires formal proposal and approval by course staff). It is recommended to use the tools from the labs (e.g. PyTorch, Accelergy, Timeloop).

Grades:
  • Class Participation: 5%
  • Four Labs: 55% UG / 40% G
    • Lab 1 (10% UG / 9% G), Lab 2 (10% UG / 9% G), Lab 3 (15% UG / 13% G), Lab 4 (10% UG / 9% G), Lab5 (UG only 10%)
  • Paper Review: 10%
  • 2 Quizzes: 15% each UG / 12.5% each G
  • Final Design Project (G only): 20%



Late Policy for Labs:
  • You should always submit your labs on time. Nonetheless, since unexpected situations, like illnesses, might occur, you have a budget of 5 late days throughout the semester.
  • The budget is spent in increments of 1 day.
  • You do not need to inform us about your use of your budget. The course staff will keep track of the days you have spent.
  • You will receive zero credit once your budget is expended (Note: please contact course staff regarding extenuating circumstances)

Course Reading Material: See the reading list page for details.

Communication: Please check for announcements, clarifications to assignments, and answers to common questions on Piazza: https://piazza.com/class/ldf2iof72w51sl. You can also contact all the course staff via Piazza, and contact the TAs only via email.