The goal of the MEMOCODE conference series, the seventh in a series of successful international conferences, is to gather together researchers and practitioners in the field of the design of modern hardware and software systems to explore ways in which future design methods can benefit from new results on formal methods.

Call for papers

Call for papers (pdf)

Camera-ready Author Instructions

Design contest

Conference Location

Conference Registration

Early registration ends 6/15/09

Hotels Information

 

Sponsors

ACM SIGBED, ACM SIGDA, IEEE CAS

and IEEE CEDA

 

 

Invited Speakers:

Amir Pnueli - NYU - Property Synthesis

David Harel - Weizmann - Systems Biology

Martin Rinard - Static Resource Bounds

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We have a very interesting tutorial with a great expert:

Thomas Popp from Graz University of Technology will speak about (and show!): implementation attacks & countermeasures

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Panel Discussion:

Satnam Singh, Microsoft Research, Cambridge

Klaus Schneider, University of Kaiserslautern

Karen Pieper

Rainer Doemer, University of California, Irvine

Arvind, MIT

Gael Clave, Texas Instruments, Nice

Michael Kishinevsky, Intel

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Seventh ACM-IEEE

International Conference on

Formal Methods and Models for Codesign (MEMOCODE'2009)

 

Stata Center - Room 32-155

  July 13-15, 2009, Cambridge, Massachusetts - USA

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Accepted Papers


Anita Lungu, Pradip Bose, Daniel Sorin, Steven German and Geert Janssen.   
Multicore Power Management: Ensuring Robustness  via Early-Stage Formal   Verification  
  
Omid Sarbishei, Mahmoud Tabandeh, Bijan Alizadeh and Masahiro Fujita.   
High-Level Optimization of Integer Multipliers over a Finite Bit-Width   with Verification Capabilities  
  
Daniel Williams, Aprotim Sanyal, Dan Upton, Jason Mars, Sudeep Ghosh and  Kim Hazelwood. 
A Cross-Layer Approach to Heterogeneity and Reliability  
  
Jeannet Bertrand and Briand Xavier. 
Combining control and data abstraction in the verification of hybrid systems  
  
Jeong-Han Yun, Chul-Joo Kim, Sunae Seo, Taisook Han and Kwang-Moo Choe.  
Refining Schizophrenia via Graph Reachability in Esterel  
  
Marco Bozzano, Alessandro Cimatti, Marco Roveri, Joost-Pieter Katoen, Viet Yen Nguyen and Thomas Noll. 
Codesign of Dependable Systems: A   Component-Based Approach  
  
Fabrizio Ferrandi, Marco Lattuada, Christian Pilato and Antonino Tumeo.  
Performance Estimation for Task Graphs Combining Sequential Path   Profiling and Control Dependence Regions  
  
Malay Ganai and Weihong Li. 
Bang for the Buck: Improvising and Scheduling Verification Engines for Effective Resource Utilization  
  
Jens Brandt and Klaus Schneider. 
Static Data-Flow Analysis of  Synchronous Programs  
  
Nalini Vasudevan and Stephen A. Edwards. 
Buffer Sharing in CSP-like Programs  
  
Eric Chung and James Hoe. 
Real World Microprocessor Design Using High-level Approaches  
  
Hubert Garavel, Claude Helmstetter, Olivier Ponsini and Wendelin Serwe.   
Verification of an Industrial SystemC/TLM Model using Lotos and CADP  
  
Luigi Di Guglielmo, Franco Fummi and Graziano Pravadelli. 
The Role of  Mutation Analysis for Property Qualification  
  
Peter Boehm. 
Incremental Modelling and Verification of the PCI Express Transaction Layer  
  
Muralidaran Vijayaraghavan and Arvind Arvind. 
Bounded Dataflow Networks and Latency-Insensitive Circuits