% Compiling section of ISCA paper

\section{Software for {\archname}}

\label{sec-compiling}

We believe that {\archname} will efficiently support code developed
for HEP/Tera, the J-machine, EM-4, \etc, because in each case it
provides a superset of their capabilities.  Thus, any compiler
techniques developed for these machines are directly applicable to
{\archname}.  Further, we believe that {\em all\/} these architectures
will efficiently support SIMD/SPMD programming models, again because
they are more general.

The real challenge is to provide general purpose programming models in
which applications can have much more dynamic structure.  Here, the
problem is the extraction of {\em excess parallism\/}, \ie\
parallelism that is reasonably greater than the number of nodes in the
MPA.  This will allow each node to have sufficient threads so that
even though some may be waiting for incoming messages, there is a high
probability that other threads are ready to run.\footnote{A MIMD is a
terrible thing to waste!}.

A very promising approach is to start with {\em declarative
languages\/} where the compiler can effortlessly extract large amounts
of fine grain parallelism.  Nikhil~\cite{Nikhil90e} and Culler {\em et
al\/}~\cite{Culler90a} have proposed compiler flowgraph formalisms
which, inspired by dataflow graphs and the P-RISC model, make explicit
the notion of threads as a unit of scheduling.  Culler's Threaded
Abstract Machine (TAM) has been implemented and is in use for over two
years on a variety of platforms (RISC uniprocessors, shared memory
multiprocessors, NCUBE/2, \etc).  His experiments have provided much
data on achievable thread lengths, frequency of synchronization,
instruction counts, comparisons with dataflow instructions, \etc, all
of which have had a strong influence on {\archname}, which almost
directly mirrors the TAM compilation model.  The TAM work is an
existence proof that compilation of large, non-trivial programs with
massive amounts of parallelism for {\archname} is possible.
Nevertheless, there remain serious research issues concerning dynamic
storage management, load balancing, \etc\

\bigskip

\noindent
{\bf Acknowledgements}: MIT and Motorola, Inc. are collaborating on
the design and construction of a real {\archname} machine.  Bob
Greiner and Ken Traub of Motorola have contributed significantly
towards the architecture and software systems, respectively.
