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%%% Illustrations --from ILLUSTRATIONS.TEX
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%\def\illfileprefix{/bk/motomura/pics/}
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\hyphenation{Micro-electronics Shimo-kuzawa Kana-gawa}


\begin{document}
%\small

\covertitle{Local Memory Reference Behavior of Fine-Grain Multithreaded
Execution \\}
\coverauthor{{\bf Masato Motomura} \\ {\bf Gregory M. Papadopoulos}}
\trnumber{Comutation Structure Group Memo 346}
\coverdate{\today}

\researchcredit{%
This report describes research done at the Laboratory for Computer
Science of the Massachusetts Institute of Technology. Funding for the
Laboratory is provided in part by the Advanced Research Projects Agency
of the Department of Defense under the Office of Naval Research
contract N00014-89-J-1988.}

\title{\vspace {-1.5pc} Local Memory Reference Behavior of Fine-Grain
Multithreaded Execution \vspace {-0.5pc}}

\author {Masato Motomura\thanks{On leave from System ULSI Research
Laboratory, Microelectronics Research Laboratories, NEC Corporation,
1120 Shimokuzawa, Kanagawa 229, Japan. Email:
motomura@mel.cl.nec.co.jp} ~~and ~Gregory M.
Papadopoulos\thanks{Supported by NSF Young Investigator Award grant
number CCR-9258349. Email: greg@abp.lcs.mit.edu \newline\newline
Funding for the work is provided in part by the Advanced Research
Projects Agency of the Department of Defense under the Office of Naval
Research contract N00014-89-J-1988.}\\ Laboratory for Computer Science
\\Massachusetts Institute of Technology\\Cambridge, MA 02139}

\vspace {-1.0pc}

\date{}

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\maketitle

\begin{abstract}
\vspace {-1.0pc}

Multithreading is a potentially important technique to deal with the
effects of large communication latencies in multiprocessors.  In this
paper, we study the behavior of local memory references under a
fine-grain multithreaded execution model. Based on the threaded
abstract machine (TAM), the model is a compiling convention for
distributed memory multiprocessors and does not presuppose special
hardware support like multiple hardware contexts.  We believe we have
made three basic contributions to the understanding of local reference
streams under fine-grained multithreading: (1) we extensively studied
the execution traces from two distinct parallelism regimes, (2) we
have determined a power-law working set model for local activation
frame and instruction references, and (3) using the working set model
we have derived an analytic cache model which provides excellent
agreement with actual cache simulations.

%\flushleft{{\bf Keywords:} Multithreading, Cache Models, Working Set
%Behavior, Fine-Grain Parallelism, Latency Tolerance}

\vspace {-0.3pc}
\end{abstract}  

%\bibliographystyle{plain}
%\pagestyle{empty}
%\markright{DRAFT: \today}

\pagestyle{plain}


\input sec-introduction
\vspace {-0.3pc}

\input sec-TAM-model
\vspace {-0.3pc}

\input sec-simulation
\vspace {-0.3pc}

\input sec-analysis
\vspace {-0.3pc}

\input sec-cache-model
\vspace {-0.3pc}

\input sec-validation
\vspace {-0.3pc}

\input sec-conclusion
\vspace {-0.3pc}

\input sec-acknowledgements
\vspace {-0.3pc}

\input sec-bibliography
\vspace {-0.3pc}

\end{document}

