%%=========================================================================
% * Overall goal: overview of \start/, the design philosopy, and 
%                 justification.  
%   - building a machine out of as much stock components, both hardware
%     and software as possible.  
%   - reason for this is:
%     # high rate at which commercial microprocessors are improving
%     # engineering of a system still takes much effort 
%     # development of systems software take a trememdous amount of
%       effort.
%   - Will be good if we can ``layer'' a parallel machine on top of
% stock machines.  Layering of both hardware and OS, maybe even the
% compiler.  
%   - encourage introduction of parallel processing in an evolutionary
% manner.  
%   - Want to do it in a way that provides the best possible MPP
% support: high bandwidth, low latency, user level network access;
% shared memory support.  
%   - The hope is that eventually, the good features will influence the
% design of microprocessors, e.g. the NIU may make it on chip.   
% 
%%=========================================================================

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\section{Introduction}
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\label{sec:intro}
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The past few years have seen the demise of many companies dedicated to
making high performance parallel computers.  Some members of the
computing community have gone as far as saying that parallel
processing, in a classic sense, is dead.  Although we strongly
disagree with this assessment, we do agree that parallel computing is
still at an adolescent stage in its development.  We believe the
problem is two-fold; it is too hard to program parallel computers, and
the hardware, especially for {\em massively} parallel machines, costs
too much and does too little.  We are trying to solve the first
problem by using implicitly parallel functional languages like
Id\cite{Id,arvind90} and pH, and multithreaded languages such as
Cid\cite{Nikhil94} and Cilk\cite{BlumofeJoKuLeRaShZh94}.  This paper,
however, concentrates on \start/, our solution to the second issue.

Mainstream computers have become commodities.  PC's have been selling
in the millions, forcing down prices, speeding up time tables and
making rapid strides in performance.  The economies of scale required
to stay competitive have resulted in consortia to define and design
common systems, enabling hardware to be manufactured in huge
quantities.  Parallel computers, on the other hand, have traditionally
used a lot of custom hardware necessitating the use of custom
software.  By the time the machine is ready to be sold, its processing
node is generally one or two generations out-of-date, making the
current commercial microprocessors a factor of two or more faster.
Since both the development team and customer base are small, problems
cannot be found and worked out quickly, often making custom machines
and their software unreliable.

Coupling unreliability with the high cost of custom development, the lack
of shrink-wrapped software due to the unique nature of parallel machines
and the difficulty in writing custom applications, buying a parallel
computer is difficult to justify.  One would buy such a system only if the
application was critical enough to warrant a dedicated {\em expensive}
machine and the associated custom software development and maintenance
cost.  Massively parallel computers have fallen into the class of
traditional supercomputers, rather than being affordable, widely-available
high performance computers as originally envisioned.

\start/\footnote{The {\sc *T} or {\sc StarT} project has gone through
many changes over its lifetime.  For a reasonably detailed history of
the many generations of {\sc *T}, see \cite{StarTNG94}}, a joint
project between MIT and Motorola, tries to address these problems.
\start/ is based on a commercial symmetric multiprocessor (SMP) {\em
system} using PowerPC 620 processors. The goal of the project is to
deliver very aggressive parallel performance by making small,
manageable changes to the base SMP.  We have added support for low
overhead, high-bandwidth, user-level messaging, and support for
globally coherent shared memory.  Starting from a commercial system
allows us to leverage infrastructure such as the processor, operating
system, memory subsystem, and I/O subsystem.  By borrowing most of the
system technology, we dramatically reduce development time and cost,
allowing us to deliver \start/ at approximately the time the base SMP
is introduced.  \start/, though a research machine, is {\em
commercially} competitive in parallel performance.  \start/ can also
run stock sequential applications efficiently.  Just as SMP's allow
better sharing of resources such as processors, memory and I/O
capability between jobs, \start/ allows better sharing of a collection
of such resources by being able to run sequential, shared-memory and
message-passing parallel applications.

While there are many advantages to using an entire system as the building
block of a parallel machine, there are many technical challenges as well.
Our design not only has to live with the PowerPC 620 microprocessor, which
is optimized for sequential execution, it cannot change the base system in
any significant way.  Observing these tight constraints while providing
competitive performance is the topic of this paper.

{\bf Organization:} The next section makes a slight detour to explore
the next generation of microprocessors.  Understanding certain
processor issues is essential to understanding \start/.  In
Section~\ref{sec:hdw-overview}, we present an overview of the \start/
hardware.  This is followed in Section~\ref{sec:msg-support} with a
discussion of message passing support on \start/.
Section~\ref{sec:sm-support} discusses how shared memory is
implemented on \start/.  Finally, we compare \start/ with some related
work in Section~\ref{sec:related-wk} before concluding with the
current status of the machine.

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%%                               END
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