
\begin{abstract}

This paper presents the architecture of a network interface unit
(NIU) to provide a wide range of shared memory and message passing
(S\&M) semantics within the confines of an {\em open} system composed
of a cluster of SMP's and a high speed interconnection network.  An open
system allows commodity items to be easily assembled and replaced
without requiring hardware modifications to the commodity components.

The \start/ system, which is built using PowerPC 604e-based SMP's from
IBM and the low-latency, high-bandwidth Arctic network developed at
MIT, is an example of such a system. The \start/ NIU card plugs into a
processor card slot of each SMP and implements shared memory on top of
a message-passing layer which is fully exposed to application
programs.  Four message passing mechanisms are directly supported to
achieve very high performance over a wide spectrum of communication
types and sizes.  The NIU is also capable of supporting protocols for
a wide variety of memory models.  \start/'s protection scheme improves
upon past designs by not requiring strictly synchronized
gang-scheduling, and by supporting non-monolithic protection domains
in a multiprogrammed environment.  Performance predictions, based on
fully synthesizable Verilog show \start/'s novel message passing
mechanisms offer a definitive advantage in a multi-threaded
environment without compromising the performance in a single-threaded
environment.  Preliminary shared memory simulations are also very
promising.

\end{abstract}




