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Group 1: A Load-Ballanced Graphics Pipeline on a Heterogeneous Multicore
Jiawen Chen and Jonathan Ragan-Kelley
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Group 2: Processor Parameterization for Redistribution of Resources Among Pipeline Stages
Roberto Carli, Alessandro Yamhure, and Olivier Bichler
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Group 3: Reed-Solomon Decoder
Abhinav Agarwal, S.R.K. Branavan, and Grant Elliott
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Group 4: Re-Order Buffer for the SMIPSV2 Processor
Wei-Yin Chen and Myong Hyon Cho
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Group 5: Difference of Gaussian Image Pyramids for Hardware-Accelerated SIFT
Ballard Blair and Chris Murphy
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Group 6: GZIP
Dmitry Kashlev and Behram Mistree
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Group 7: Vorbis Decoder
Kevin Kelley
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Group 8: H.264 Decoder Area and Power Optimizations
Elliott Fleming
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Group 9: HASIM Timing Model For Smips
Muralidaran Vijayaraghavan
Digital Systems
