Prerequisites: 6.001 and 6.004 or equivalent
Credit: 5-5-2 H-Level
Lectures: MWF 2:30-4, 32-124
Group Meetings: 32-G866
6.375 is a project-oriented course teaching new methodologies for designing multi-million-gate hardware designs using high-level synthesis tools in conjunction with standard commercial EDA tools. The emphasis is on modular and robust designs; reusable modules; correctness by construction; architectural exploration; meeting area and timing constraints; and developing functional FPGA prototypes.
The first half of the course includes lectures on FPGA technologies; physical design issues such as clocking, wire delay, and testing; hardware description languages including Verilog and Bluespec; and the design of systems-on-chip. Occasional guest lecturers will describe their experiences building large industrial and academic chips. In addition, three lab assignments using commercial EDA tools will prepare students for the class project.
In the second half of the course, students will work in small groups on large hardware design projects supervised by the course staff and graduate student mentors. Past projects have included out-of-order processors, cache-coherent memory systems, and advanced memory access schedulers. Students will develop working FPGA prototypes of their implemetations.