Although there is no text book for this course, there are several books and online resources which may be useful as references. The course locker (/mit/6.375/doc) has user manuals specific to the tools we will be using in the class. The textbooks listed below can be borrowed from the CSAIL reading room (8th floor Gates tower), or the Barker Engineering Library.
Verilog HDL: A Guide to Digital Design and Synthesis
Samir Palnitkar, 2nd Ed, 2003
A good introduction to Verilog-2001 well suited for the beginner.
HDL Chip Design
Douglas Smith, 2001
A great book for the intermediate Verilog designer. Clearly outlines the relationship between Verilog models and the corresponding synthesized circuit.
Principles of CMOS VLSI Design: A Systems Perspective
Neil Weste and Kamran Eshraghian, 2nd Ed, Addison Wesley, 1994
Covers a wide range of digital design topics from circuits to micro-architecture.
Application-Specific Integrated Circuits
Michael Smith, Addison Wesley, 1997
A useful reference on many of the lower-level details about synthesis, place & route, and FPGA mapping.
Closing the Gap Between ASIC and Custom
David Chinnery and Kurt Keutzer, Kluwer Academic Publishers, 2003
Discusses tools and techniques for addressing physical design issues in an attempt to improve the area, power, and performance of ASIC designs.
Digital Integrated Circuits: A Design Perspective
Jan Rabaey, Prentice Hall, 1996
Classic text on desiging digital circuits. Most of the information in this book is below the level of design we will be using in 6.375, but it is a valuable resource for learning more about the circuits we are synthesizing to.
Logical Effort: Designing Fast CMOS Circuits
Ivan Sutherland, Bob Sproull, and David Harris, Morgan Kaufman, 1999
This book introduces a framework for simple back-of-the-envelope calculations useful when designing CMOS circuits. The first chapter is available online.
See MIPS Run
Dominic Sweetman, 1999
A very readable book about the MIPS architecture for assembly level programmers.
Verilog-2001: What's New
Stuart Sutherland, Int'l HDL Conference and Exhibition, March 2000
Crystalizes the key differences between Verilog-1995 and Verlog-2001.
Parameterized Models Using Verilog 2001
Cliff Cumminggs, Int'l HDL Conference and Exhibition, May 2002
Clearly describes the evils of unnamed parameter instations and `defines and shows how the new features in Verilog-2001 provide much safer ways to achieve the same effects.
RTL Coding Styles That Yield Simulation and Synthesis Mismatches
Cliff Cumminggs and Don Mills, Synopsys Users Group, San Jose 1999
Contains an interesting discusion on case statements including information on the common full_case/parallel_case attributes and on the advantages of casez over casex.
Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill!
Cliff Cumminggs, Synopsys Users Group, San Jose 2000
Clearly explains the fundamentals behind the common wisdom concerning when to use procedural blocking assignments versus non-blocking assignments.
Library Architecture Challenges for Cell-Based Design
Barbara Chappel, et. al., Intel Technology Journal, February 2004
An interesting look at how the 90um Intel Pentium 4 processor was able to use a cell-based design methodology while still achieving an aggressive performance target.
Designing a Reorder Buffer in Bluespec
Nirav Dave, VLSI, Formal Methods and Models for Codesign, June 2004
The complexity and performance requirements of a reorder buffer make it an interesting component for illustrating many of the issues involved in large-scale design with Bluespec.
Synthesis of Operation-Centric Hardware Descriptions
James Hoe and Arvind, Int'l Conf. on Computer Aided Design, Novemeber 2000
Term Rewriting Systems form the theoretical basis for Bluespec and thus this paper outlines some of the deeper theoretical issues involved in efficient hardware synthesis from guarded atomic actions.
A short demonstration of the use RWire and ConfigReg to improve pipeline thruput. Contains source files and a Makefile
SMIPS ISA documentation
Course Webpage for 6.375 (Spring 2007)
The course webpage includes lecture slides, lab handhouts, and final project reports.
Course Webpage for 6.375 (Spring 2006)
The course webpage includes lecture slides, lab handhouts, quiz solutions, and final project reports.
Course Webpage for 6.884 (Spring 2005)
The very first year 6.375 was offered it was listed as 6.884. The course webpage includes lecture slides, lab handhouts, quiz solutions, and final project reports.
Course Webpage for 6.371 (Fall 2002)
6.371 Introduction to VLSI Systems, which is no longer offered at MIT, focused more on the low-level physical design issues discussed in 6.375.
Online Verilog HDL Quick Reference Guide
Very useful online reference for Verilog-1995. It won't have the newer Verilog-2001 constructs but it is still a very convenient way to look up 99% of what you need to know.
Cliff Cummings' Papers on Verilog
Many papers by Cliff Cummings who is a respected expert on Verilog simulation and synthesis.
MIPS ISA Documentation
Official site for the various MIPS architecture specifications. Much of the information on the MIPS32 architecture is applicable to the SMIPS ISA.
Bluespec, Inc Webpage
Includes technical white papers and a few tutorials which may be of interest.
Bluespec Demo on DeepChip
DeepChip is a great resource for news on varous EDA tools. The site also includes video presentations which demo various tools. There is a Bluespec demo which gives a pretty good overview.