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Labs
- Lab 1: [ PDF ]
Tutorials
The following tutorials show how to use the 6.375 toolflow on Athena/Linux. See 6.375 Athena Computing Resources for more information on the computing resources available for the class.
- T01: Simulating Verilog RTL Using Synopsys VCS [ PDF ]
- T02: Using CVS to Manage Source RTL [ PDF ]
- T08: GAA-to-RTL Synthesis using the Bluespec Compiler [ PDF ]
- T09: RTL-to-Gate Synthesis using the SynplifyPro [ PDF ] [ SRC ]
- T10: Synthesis and Place and Route using Quartus II [ PDF ]
- T11: System Building with SOPC Builder [ PDF ]
- T12: Embedded Programming with the NIOS II IDE [ PDF ]
- T13: Importing IP into SOPC Builder [ PDF ]