6.175: Constructive Computer Architecture (Fall 2017)

What is 6.175?

6.175 teaches the fundamental principles of computer architecture via implementation of different versions of pipelined machines with caches, branch predictors and virtual memory. Emphasis on writing and evaluating architectural descriptions that can be both simulated and synthesized into real hardware or run on FPGAs. The use and design of test benches. Weekly labs. Intended for students who want to apply computer science techniques to complex hardware design.

Topics include combinational circuits including adders and multipliers, multi-cycle and pipelined functional units, RISC Instruction Set Architectures (ISA), non-pipelined and multi-cycle processor architectures, 2- to 10-stage in-order pipelined architectures, processors with caches and hierarchical memory systems, TLBs and page faults, I/O interrupts.

Instructors

Lectures

MWF 3:00 pm, 34-302.


Schedule

Please check back frequently as this schedule may change.

This calendar is also available on Google Calendar.

WeekDateDescriptionDownloads
1Wed, Sept 6Lecture 1: Introduction.
Lab 0 out
[pptx] [pdf]
Fri, Sept 8Lecture 2: Combinational Circuits
Lab 1 out
[pptx] [pdf]
2Mon, Sept 11Lecture 3: Combinational ALU [pptx] [pdf]
Wed, Sept 13Lecture 4: Sequential Circuits [pptx] [pdf]
Fri, Sept 15Lecture 5: Modules with Guarded Interfaces
[pptx] [pdf]
3Mon, Sept 18Lecture 6: Multirule Systems.
Lab 1 due Lab 2 out
[pptx] [pdf]
Wed, Sept 20Lecture 7: Conflict Matrix [pptx] [pdf]
Fri, Sept 22Tutorial 1: Modules are the backbone of bluespec and a tour of known problems. [pptx] [pdf]
4Mon, Sept 25Lecture 8: Folded circuits
Lab 2 due Lab 3 out
[pptx] [pdf]
Wed, Sept 27Lecture 9: Introduction to RISCV [pptx] [pdf]
Fri, Sept 29No class
5Mon, Oct 2Lecture 10: Non-Pipelined RISCV
Lab 3 due Lab 4 out
[pptx] [pdf]
Wed, Oct 4Lecture 11: Pipelined RISCV [pptx] [pdf]
Fri, Oct 6Tutorial 2 [pptx] [pdf]
6Mon, Oct 9No Class *
Wed, Oct 11Lecture 12: Control hazard Lab 4 due Lab 5 out [pptx] [pdf]
Fri, Oct 13Tutorial 3 [pptx] [pdf]
7Mon, Oct 16 L13: Data Hazard
[pptx] [pdf]
Wed, Oct 18Lecture 14: Memories and Caches [pptx] [pdf]
Fri, Oct 20Tutorial 4: Scoreboard and search fifos. Lab 5 due Lab 6 out [pptx] [pdf]
8Mon, Oct 23 L15: Caches
[pptx] [pdf]
Wed, Oct 25Lecture 16: BTB and BHT [pptx] [pdf]
Fri, Oct 27Tutorial 5: Tour of some bugs one can get writting a processor. [pptx] [pdf]
9Mon, Oct 30 L17: BHT
[pptx]
Wed, Oct 1Lecture 18: Exceptions [pptx]
Fri, Nov 3Tutorial 6: Cache, Infrastructure lab7, exceptions. Lab 6 due Lab 7 out
9Mon, Nov 6 L19: Virtual Memory
[pptx]
Wed, Nov 8L20: Virtual Memory no slides
Fri, Nov 10No class
10Mon, Nov 13 L21: Sequential Consistency Lab 7 due Lab 8 out
[pptx]
Wed, Nov 15Lecture 22: Cache coherency
Fri, Nov 17Tutorial
11Mon, Nov 20 L22: Cache Coherency, more Lab 8 due Project part 1 out