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Lectures
- L01: Complex Digital Systems [ L01-Introduction.pdf ]
- L02: Introduction to Bluespec [ L02-IntroductionBSPrint.pdf ]
- L03: Combinational Circuits in Bluespec [ L03-IFFTprint.pdf ]
- L04: Simple Inelastic and Folded Pipelines [ L04-InelasticPipelinesPrint.pdf ]
- L05: Elastic Pipelines and Basics of Multi-rule Systems [ L05-ConcurrencyAnalysisFIFOsPrint.pdf ]
- L06: IP Lookup: Some subtle concurrency issues [ L06-IPLookupPrint.pdf ]
- L07: Modeling Processors [ L07-PipelinedProcessorsPrint.pdf ]
- L08: Elastic Pipelines: Concurrency Issues [ L08-ProcessorsElasticPipelinesPrint.pdf ]
- L09: Modular Refinement [ L09-Modular RefinmentPrint.pdf ]
- L10: Stmt FSM [ L10-StmtFSMPrint.pdf ]
- L11: Concurrency [ L11-Concurrency.pptx ]
- L12: Hardware-Software Codesign [ L12-Hw-Sw-Codesign.pptx ]
Lab Assignments
-
Lab 1: A Simple Audio Pipeline
[ lab1.pdf ] (02/02/11)
[ lab1-harness.tar.gz ] (02/05/11) -
Lab 2: Fast Fourier Transforms: Extending the Audio Pipeline
[ lab2.pdf ] (02/11/11)
[ lab2-harness.tar.gz ] (02/11/11) -
Lab 3: Pitch Shifting: Completing the Audio Pipeline
[ lab3.pdf ] (02/18/11)
[ lab3-harness.tar.gz ] (02/18/11) -
Lab 4: Audio Pipeline on the FPGA
[ lab4.pdf ] (02/25/11)
[ lab4-harness.tar.gz ] (02/25/11) -
Lab 5: Pipelining an SMIPSV2 Processor: Part I
[ lab5.pdf ] (03/04/11)
[ lab5-harness.tar.gz ] (03/04/11) -
Lab 6: Pipelining an SMIPSV2 Processor: Part II
[ lab6.pdf ] (03/11/11)
Final Project
- Final Project [ finalproject.pdf ] (03/07/11)
- Final Report and Presentation Guidelines [ finalreport.pdf ] (05/03/11)
Tutorials
- Tutorial 1: Introduction to Bluespec [ Tutorial1.bsv ] (02/04/11)
- Tutorial 2: Types, etc... [ Tutorial2.bsv ] (02/11/11)
- Tutorial 3: Scheduling Part 1 [ Tutorial3.bsv ] (02/18/11)
- Tutorial 4: Sce-Mi [ Tutorial4.tar.gz ] (02/25/11)
- Tutorial 5: Scheduling Part II [ Tutorial5.bsv ] (03/04/11)
- Tutorial 6: Final Projects [ Tutorial6.pdf ] (03/11/11)
Other
- Sample project using DDR2 with Sce-Mi [ ddr2sample.tar.gz ] (04/08/11)